1. Field of the Invention
This invention relates generally to CMOS design and, more particularly, to a temperature stable CMOS device and temperature stable bias circuit, made using the above-mentioned temperature stable CMOS device.
2. Description of the Related Art
CMOS field effect transistors (FETs), as well as many other active silicon devices, as used as elements in temperature compensation circuitry. One such circuitry supplies a bias voltage that remains constant, independent of supply voltage and temperature changes. However, it is well known that FET devices have varying temperature characteristics. Therefore, compensation circuitry must be added to cancel out the temperature variations in the active components.
In general, a positive temperature coefficient is produced by using two transistors operated at different current densities as is well understood. When bipolar active devices are used, a resistor is connected in series with the emitter of the transistor that is operated at a smaller current density. Then, the base of this transistor and the other end of the resistor are coupled across the base and emitter of the transistor operated at the higher current density to produce a delta VBE voltage across the resistor that has a positive temperature coefficient. This positive temperature coefficient voltage is combined in series with the VBE of a third transistor which has a negative temperature coefficient in a manner to produce a composite voltage having a very low or zero temperature coefficient.
Such prior art voltage reference circuits are generally referred to as bandgap voltage references because the composite voltage is nearly equal to the bandgap voltage of silicon semiconductor material, i.e., approximately 1.2 volts. Typically, the two transistors of the bandgap cell are NPN devices with the first transistor having an emitter area that is ratioed with respect to the emitter area of the second transistor, whereby the difference in the current density is established by maintaining the collector currents of the two transistors equal.
Bandgap stages and bandgap circuits are conventional and are described, for instance, in the book entitled, xe2x80x9cHalbleiter-Schaltungstechnikxe2x80x9d (Semiconductor-Circuit Technique) by U. Tietze and Ch. Schenk, 5th revised edition, Springer Verlag, Berlin, Heidelberg, New York 1980. Using bandgap circuits, reference voltages can be generated which are independent of the temperature coefficients of the components used therein. In other words, such a circuit supplies a temperature independent reference voltage. However, these considerations are only valid for first-order temperature dependencies in a relatively narrow temperature range. In practice, a voltage-temperature curve is only straight or independent of temperature in a narrow temperature range. Actually, such circuits still have a temperature dependency, which may have a parabolic shape with a change of about 1% in a temperature range from xe2x88x9255xc2x0 C. to +125xc2x0 C., according to an article in xe2x80x9cIEEE Journal of Solid-State Circuitsxe2x80x9d, Vol. SC 15, No. 6, December 1980, Pages 1033 to 1039.
For certain applications, such as in fast digital-analog converters or analog-digital converters, the above-mentioned temperature dependency may still have a disturbing effect due to higher order temperature effects, so that the reference voltage generated by the bandgap circuit is not sufficiently independent of temperature. Measures for the temperature compensation of temperature dependencies of higher order, particularly second order, have already become known, for instance, from the above-mentioned journal xe2x80x9cIEEE Journal of State-Solid Circuitsxe2x80x9d. In principle, these are circuitry measures, through which a current is fed to a bandgap circuit, the current having a temperature dependency compensating the temperature dependency of the band gap circuit.
It would be advantageous if a CMOS FET could be fabricated with predetermined temperature characteristics over a relatively wide range of temperatures.
It would be advantageous if a CMOS FET could be fabricated with a constant drain current and constant gate-to-source voltage over a wide range of temperatures.
It would be advantageous if a CMOS FET with predetermined temperature characteristics could be used in a bias voltage circuit to provide a bias voltage with a predetermined temperature coefficient over a wide range of temperatures.
Accordingly, a bias circuit is provided which is independent of temperature and power supply variations, even when low power supply voltages are used. The bias circuit generates a reference current that is scaled by a resistance. When the resistance is used as a load in a differential pair biased by this current, the swing at the output of the differential pair can be made constant, even if the nominal value of the resistor changes over temperature.
More specifically, a FET with predetermined temperature characteristics is used in the bias circuit. The FET has a first gate width (W) and a first channel region having a first channel length (L) that are selected to provide a predetermined drain current (ID) and gate-to-source voltage (Vgs) in a first temperature range.
In one aspect of the invention, the load resistor has a temperature coefficient of zero, and the predetermined drain current remains approximately constant across the first temperature range. The channel length and the gate width are selected so that their effects create a drain current with a zero temperature coefficient across a relatively wide range of temperatures. Alternately, the load resistance has a predetermined, non-zero, temperature coefficient. Then, the channel length and the gate width are selected so that their effects create a drain current temperature coefficient which corresponds to the load resistance coefficient, so that a constant bias voltage can be maintained.
Specifics of the FET fabrication, bias circuit design, and methods of generating a predetermined bias voltage and FET with predetermined temperature characteristics are provided in the detailed description of the invention below.